The invention relates to a register building block with bipolar memory cells wherein each bipolar memory cell has two double emitter transistors connected in cross-coupled fashion.
The product of signal transit time and dissipation loss generally is constant to a large extent with predetermined semiconductor circuit techniques. Within certain limits, a reduction of the signal transit time is possible by increase of the dissipation loss and vice versa. With the integration of circuits having small signal transit times, particularly those of the ECL technique based on the use of differential amplifiers and/or current switches with emitter-coupled transistors, difficulties frequently arise due to inadmissibly high dissipation losses.
In ECL technique it is known, starting from a standardized operating voltage, to use so-called series coupling to save dissipation loss, if the logic design permits this. Therefore, up to three current switches are connected in series to a joint constant current source (see U.S. Pat. No. 3,519,810 incorporated herein by reference). This is accomplished in such a manner that the emitters of the transistors of an "upper" current switch are connected to the collector of a transistor of a "lower" current switch. Then it will depend on the switching position of the "lower" current switch whether the "upper" current switch is fed current at all, that is whether it is effectively controllable.
A memory cells usable in connection with ECL circuits is known from the literature article "IEEE spectrum" May 1971, pages 42-48, particularly FIG. 3 (C), incorporated herein by reference. The memory cell comprises two cross-coupled double emitter transistors with two ohmic load resistances which are connected unilaterally with a word selection line. The emitters of the transistors on each side are connected to a bit line, and the other two emitter are connected jointly to a source of constant current.
By observing in memory circuits the access time in view of the signal transit time, particularly the time required for recording new information, then for the remainder the initially mentioned condition applies whereby the reduction of the access time must be paid by increased dissipation loss. Access times as short as possible are an important goal, particularly in register building blocks.